I have this old Triumph Spitfire. When I got it the turn signal consisted of a standard Digikey toggle switch with a ball point pen body stuck on the toggle. I bought a new replacement for the turn signal and installed that but even though it’s listed as the stock replacement, it doesn’t cancel when you come out of a turn.
The original owner, however, still had the old one and gave it to me.
So I took it apart to find out why it was broken.

(for any picture in this post, if you click on it you can get a larger more detailed version.)

 

There’s a big hole burned through one part where it shorted.

The material is phenolic with copper on top, 0.031″ in thickness: a standard printed circuit board, with a very specific outline.

Well, I thought it would be interesting to learn how to take a picture of something and turn that into a copy of the object. I’ve gone down this route in several different ways, and in this case I’m going to cover what’s probably the fastest, if not the most precise or beautiful, manner for converting a scanned image to a circuit board, using Inkscape, pstoedit, and geda pcb.

I put a piece of graph paper on the scanner back, and the burnt-up circuit board on the face, and closed the scanner, so I could get a scan with a light, calibrated background. Having a calibrated background matters because inkscape (and scanning in general) doesn’t always honor size information.

So, a scan.

First thing is to box it in. I draw a box larger than any part of the scan, on the graph paper, because that way I can group the scan and the box, and resize it to the size I know it is from the graph paper’s scale, and know that the result is the size it should be regardless of what the scan or inkscape import process does.

At this point I zoom in on the image, add a new layer (in this case, I’m calling it ‘outline’) and hand-trace the outline using the bezier tool. (I’ll cover various autotracing options some other time.)

 

(This picture particularly benefits from being larger: it’s hard to see that I’ve traced an outline around the board.)

In this case, I will need two layers: board outlines, and copper traces. The reason for this is that I’m going to export this in those two groups and process them individually, one as polylines and one as filled copper area, using pstoedit.

Because they have to be processed separately, and for reasons I don’t fully understand, pstoedit converts them differently, I need to retain the box surrounding the features all the way into the pcb layout program, so I can align the two different groups once in pcb layout.

So, two layers. In this shot you can see I actually had three layers: inside, outside, and copper. One of the two pcb fabrication processes I use cuts to the line, and you specify inside or outside, so for that I want to identify each individually. The other fabrication process cuts right down the middle of lines, so it doesn’t matter what you call them, and you have to handle cutter diameter by moving the entire line in or out. Both have their good and bad sides.

Then I click on the image somewhere, outside the bounding box I drew, and drag it off to one side, to make sure I got everything traced that I wanted, and then I delete the image.

Then, select all, group. I know that the box width is 5 inches, because I’m using Imperial graph paper, so I resize the image to 5 inches (or 5000 mils).

And I drag it down close to what Inkscape considers the picture origin, in the bottom left corner of the page, where it now looks very tiny.

And I group all the copper bits into one group.

Some tricky bits ensue. I want to export the copper traces as fills, so what comes into the pcb layout is nice solid copper chunks, not outlines. That requires closed polygons. Well, I have three closed polygons in the center, and I have them inside of a box. If I export them this way I’ll get a huge solid copper box with them hidden somewhere in the middle. That is actually usable but it’s not what I want. If I delete the box, I can’t accurately align the copper to the pcb. So what I do is I draw four boxes, one in each corner of the bounding box.

Now I’m ready to start exporting stuff.
I choose what I do _not_ want to export, and hide it.

In this case, I do this with the inner and outer outlines and the bounding box, leaving just the copper and the four boxes I’ve drawn at the bounding box corners, leaving me with just the bits I want visible. I group what’s left, go to ‘properties’, and give it a name. (Remember to hit ‘set’ after naming it.)

I then export that as an Encapsulated Postscript, exporting only the object/group I just named copper. That’ll produce a [name].eps file.

That ends up with an image that looks like this.

I do the same thing with the outline. (This requires ‘select all in all layers’ then ‘unhide’ and then I group the outlines with the bounding box, give them a name, hide the copper and the copper fiducials in the corners, and export the outline as a second encapsulated postscript.)

So now I have two encapsulated postscript files, and it’s on to pstoedit. (Which I always type as ps2edit the first time, since that’s the way most unix programs are foreshortened.) I’m going to refer to the two files as lucas_copper.eps and lucas_outline.eps

You can use pstoedit to convert a postscript-like file to just about anything. I’m using the program’s hooks into gEDA’s pcb layout program here.

So, I open a terminal, and:
pstoedit lucas_copper.eps -f pcbfill lucas_copper.pcb
and likewise
pstoedit lucas_outline.eps -f pcb lucas_outline.pcb

Now I have two pcb files.
Open one: ‘pcb lucas_outline.pcb’ and you find your outline.

Go to import layout data, choose the other pcb, and it’ll appear as a draggable object on top of your first pcb.

Drag them so the fiducials match in the corners, click to set it, delete all the fiducials, and drag the resulting two layers up into the top left corner as a pair.

One came in on the layer called Spare, and the other on Silk, neither of which is what we want. Save, then go into the pcb file with VI or EMACS or gedit or whatever and cut out the copper fill under the Silk layer and copy it into the Component layer, and likewise with the outlines from the Spare layer to the Outline layer. Or just swap the names in the pcb file.

So in this case, copying all the Polygon(“clearpoly”) entries under Layer (10, “Silk”) to Layer (1, “top”) will make them become copper on the top gerber. (You can leave them on 10, if you want, or delete them: you won’t be using that gerber anyway.)

Then create gerbers and run it.
I milled this on my machine at home, using a 1mm router bit after an engraving bit did the copper etching.

To be fair, when I made this I did rotate it slightly in inkscape so the sides were straight lines, and a few other cleanup bits. I also put in drilled holes for the wiring connections. I also won’t be using this board as my final board because the final one needs to be in thinner (0.031″ rather than standard 0.062″) material and should have a bunch of vias through the material to help the copper stick to the underlying substrate more tightly. But this certainly showed that I could make a complex outline fit into a complex enclosure correctly.